The SuperSPARC is a microprocessor that implements the SPARC V8 instruction set architecture (ISA) developed by Sun Microsystems . 33 and 40 MHz versions were introduced in 1992. The SuperSPARC contains 3.1 million transistors. It was fabricated by Texas Instruments (TI) at Miho, Japan in a 0.8 micrometre triple-metal[ 1] BiCMOS process.[ 2]
There are two derivatives of the SuperSPARC: the SuperSPARC+ and SuperSPARC-II. The SuperSPARC+ was developed to remedy some of the design flaws that limited the SuperSPARC's clock frequency and thus performance. The SuperSPARC-II, introduced in 1994, was a major revision with improvements that enabled the microprocessor to reach 85 MHz in desktop systems and 90 MHz in the more heavily cooled SPARCserver-1000E.
SuperSPARC CPU modules are used in both the SPARCstation 10 and SPARCstation 20 .
The SuperSPARC-II was replaced in 1995 by the 64-bit UltraSPARC , an implementation of the 64-bit SPARC V9 ISA.
Models
SuperSPARC (Viking)
Model
CPU
L2 Cache
Clock Speed
Bus Speed
Notes
SM20
1 CPU
none
33 MHz
33 MHz
SM21
1 CPU
1 MB
33 MHz
33 MHz
only works in early SPARCserver-2000 systems
SM30
1 CPU
none
36 MHz
36 MHz
SM40
1 CPU
none
40 MHz
40 MHz
SM41
1 CPU
1 MB
40.3 MHz
40 MHz
SM50
1 CPU
none
50 MHz
50 MHz
SM51
1 CPU
1 MB
50 MHz
40 MHz
SM51-2
1 CPU
2 MB
50 MHz
40 MHz
SM52
2 CPU
1 MB
45 MHz
40 MHz
SM52X
2 CPU
1 MB
50 MHz
40 MHz
SM61
1 CPU
1 MB
60 MHz
50/55 MHz
SM61-2
1 CPU
2 MB
60 MHz
50/55 MHz
SuperSPARC II (Voyager)
Model
CPU
L2 Cache
Clock Speed
Bus Speed
Notes
SM71
1 CPU
1 MB
75 MHz
50 MHz
SM81
1 CPU
1 MB
85 MHz
50 MHz
SM81-2
1 CPU
2 MB
85 MHz
50/55 MHz
SM91-2
1 CPU
2 MB
90 MHz
50 MHz
Die photos
TI SuperSPARC I
Sun SuperSPARC II
See also
References
"TI SuperSPARC for Sun Station 3 in production". (11 May 1992). Electronic News .
DeTar, Jim (10 October 1994). "Sun sets SuperSPARC-II as UltraSPARC V9 bridge". Electronic News .
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