The 740 family was primarily intended for single-chip implementations, and included optional RAM and ROM or EPROM on-die. Other additions included a variety of optional timers, input/output lines, and many other features. It was estimated around 600 variations could be ordered.
In 2002, Mitsubishi and Hitachi merged their chip divisions to form Renesas Technology, and then in 2010 with NEC Electronics to produce Renesas Electronics. The 740 family is now properly known as the Renesas 740.
History
In 1984, the first 740-series part, M50740, appeared in the 1984 Mitsubishi Single-Chip Microcontroller Databook,[2] and was manufactured by Mitsubishi Electric. Further research is needed to determine the exact date the M50740 was announced.
In 1998, it was reported in EDN magazine, that MELPS 740 family had more than 600 different variations.[3]
In 2002, Mitsubishi Electric and Hitachi agreed to merge their chip operations into a new $7 billion semiconductor company to be called Renesas Technology. The companies said they would both move their respective semiconductor operations to Renesas, including microcomputer, logic, analog, discrete devices, and memory (flash memory, SRAM, etc.) with the exception of DRAMs.[4] Renesas Technology was established on April 1, 2003, as a joint venture of Hitachi (55%) and Mitsubishi Electric (45%).
In 2009, Renesas Technology and NEC Electronics reached a basic agreement to merge, and on April 1, 2010 the two merged into Renesas Electronics.
Though legacy Mitsubishi parts are no longer manufactured, the 740 instruction set is still alive in newer Renesas microcontroller series, such as 38000/740 series and 7200 series.
Instruction set
The Mitsubishi 740 family has a processor core that executes a superset of the 6502 instruction set including many of the extensions added in the 65C02. There is a core set of new instructions common across all 740 family members, plus other instructions that exist in specific parts.[1]
The major change in the 740 family compared to the 65C02 is the addition of a new processor status flag, T, in the formerly unused bit 6. When T is set (to 1), the X register acted as a zero page address for the second operand for instructions using zero page addressing. This allowed the program to select a location in the zero page to act as a sort of second accumulator, setting the X register to point to it, and then removing that address from the instruction format. For instance, in the 6502 an ADC addr adds the contents of a zero-page memory location at addr to the value in the accumulator. Using T, this can be reduced to a single byte, ADC. This improves code density and avoids the memory cycle needed to read the address. The value in the T flag is set and cleared using the new SET and CLT instructions.[1]
In most members of the 740 family, addresses $0008 through $0039 of the zero page are set aside as the "Special Function Registers", or SFR. These are used to control various add-ons like built-in I/O ports or timers. Some members of the family also include the "Stack Page Selection Bit" (SPSB) within the SFR. When the SPSB is clear (set to 0), the stack is relocated to the zero page instead of its normal location in page one. As most members of the 740 family have the zero page implemented on-die (instead of in external RAM), using the SPSB allows programs to have a working system entirely in a single chip, with appropriate ROMs. Many members of the 740 family include on-die ROM or EPROM as well, allowing for complete single-chip implementations of small programs like device drivers. Since the stack grows downward from the top of the page, $00FF in this case, this requires the upper portion of page to be left otherwise unused to provide space for the stack.[1]
Common instructions
The following is a list of new instructions and existing instructions with new modes in all 740 family parts.[1] Some of these are from the W65C02, and others apply only to the 740 family.
W65C02 additions
BBC - Branch Bits Clear - Branches when the contents of the bit specified in the accumulator or memory are clear (0). Known as BBR, Branch on Bit Reset, in Rockwell terminology.
BBS - Branch Bits Set - Branches when the contents of the bit specified in the accumulator or memory are set (1).
BRA - Branch Always - Jump to address where offset has been added to the program counter, +127,-128.
CLB - Clear Bits - Clear the contents of the bit specified in the accumulator or memory to zero (0).
DEC - Decrement - Decrement the contents of accumulator (6502 was X and Y or memory only).
INC - Increment - Increment the contents of accumulator or memory by one.
SEB - Set Bits - Set the specified bit contents of accumulator or memory to one.
740 family additions
CLT - Clear T Flag - Clear the contents of X-modified arithmetic mode flag to zero.
COM - Complement - Ones' complement (1's) of contents of memory and store it into memory.
RRF - Rotate Right 4 - Rotate the contents of memory to the right by 4 bits.
SET - Set T flag - Set the contents of X-modified arithmetic mode flag to one.
TST - Test - Tests whether the contents of a memory location is zero or not.
LDM - Load Memory - Load memory with immediate value.
Missing instructions
The W65C02 (as opposed to the original 65C02) added several new instructions originally designed by Rockwell Semiconductor. These included instructions to set or clear (which they referred to as "reset", not "clear") single bits in memory, as well as instructions to branch if those bits were set or clear. These were retained in the 740 family.
However, the W65C02 also included the test-and-set/reset instructions, which tested if the bit was set or clear, setting the Z flag appropriately, and then either setting or clearing that bit. These were useful for waiting on certain flags to appear and then resetting them before handling the flag. These instructions were not included in the 740.
Additionally, the original 65C02's STZ single-instruction STore Zero was not retained, but this functionality was partially replaced by LDM.
The W65C02 also added several new instructions for low-power operation. These may or may not be available on all members of the 740 series.
The following instructions are not available in M50740A, M50740ASP, M50741, M50752, M50757, M50758 parts.[1]
WIT ($C2) - Stops the internal clock until an interrupt is received. Called WAI in W65C02. Widely used by device drivers, which are generally interrupt driven.
The following instructions are not available in M50752, M50757, M50758 parts.[1]
STP ($42) - Stops the internal clock completely until a RESET is received.
Multiply and divide instructions
The following instructions are available in M37450 parts.[1]
MUL ($62) - Multiply 8-bit x 8-bit - Multiplies accumulator with the memory specified by the zero page X addressing mode and stores the high byte of the result on the stack and the low byte in the accumulator.
DIV ($E2) - Divide 16-bit / 8-bit - Divides by accumulator the 16-bit data that is the contents of M(zz+x+1) for high byte and the contents of the next address memory for low byte, and stores the quotient in the accumulator and the remainder on the stack as ones' complement.
Oscillator instructions
The following instructions are available in M50740A, M50740ASP, M50741, M50752, M50757, M50758 parts.[1]
SLW ($C2) - Releases the connection between the oscillator output and pin Xoutf.
FST ($E2) - Connects oscillator output to Xoutf.
Part groups
Mitsubishi M50734SP-10 and M50747 microcontrollers
Parts with external EPROM / ROM
These parts don't have any internal EEPROM or ROM, thus require an external EEPROM or ROM to hold the firmware.[1]
These parts have pins on the top of the package to allow an EPROM to be plugged into it. These parts are expensive and primarily used during development purposes.[1]
The difference between the M50734SP and the M50734FP, or between the M50734SP-10 and the M50734FP-10 lies only in the package. The difference between the M50734SP/FP and the M50734SP/FP-10 lies only in the maximum clock frequency.
Other vendors
In the 1990s a clone of the M50959 was manufactured in Russia with the designation KF1869VE1 (Russian: КФ1869ВЕ1).[5]
