The Am7990 is an Ethernetmedia access controller (MAC) controller introduced in 1985.[1][2] LANCE, short for "local area network controller for Ethernet", is also the brand name for follow-up versions of the chip. Its architecture is the basis for AMD's PCnet family of highly integrated single-chip Ethernet controllers, which succeeded the LANCE family. The one exception is the Am79C940 MAC.
The Am7990 chip was fabricated in NMOS technology and has no integrated Manchester encoder/decoder (ENDEC) nor does it have an integrated 10BASE-T transceiver.
AMD Am7990 Lance dieTypical application with Am7990 MAC on the left next to Am7992 Manchester encoder/decoder (Serial Interface Adapter) and AUI isolation transformer in the bottom right.
A later re-fabricated chip called the C-LANCE Am79C90 is made with 0.8 micrometre CMOS technology. The original NMOS version Am7990 and the CMOS Am79C90 version differ in some details which may affect device driver compatibility.[citation needed]
The datasheet for the CMOS version states that the CMOS and NMOS versions are the same. But the "Table B-1. Comparison Summary of the C-LANCE and LANCE Devices" in the datasheet shows they differ. These differences are not likely to require modifications of any device driver.
The PCnet family of Ethernet controllers (PCnet-ISA II, PCnet-32, PCnet-PCI II and PCnet-FAST) is LANCE software compatible. This means you should be able use the original 16-bit software on these members of the PCnet family of single-chip Ethernet controllers.
Features
The Am7990 can handle 10 megabit/s Ethernet with back-to-back packet reception with as little as 0.5 μs interframe spacing. DMA/Bus mastering 24-bit (16M) address capable. Up to 128 ring buffers can be used. 48 byte receive/transmit FIFO. Operates with 5 volt DC 5% supply and logic. Features a Time-domain reflectometer (TDR) with a granularity of 30 meter. 16.8 MHz maximum frequency. [2]
Physically a DIP-48 or PLCC-68 package is used.
CSR0 slave read data can cause timing violations on DAL lines.
Related chips
The Am7990 handles a decoded and clock-recovered Ethernet bitstream complete with a collision-detection flag. Specifically, the Am7990 contains neither the Manchester encoder/decoder and associated PLL nor the necessary PECL line drivers/receivers to drive the AUI interface. These functions are typically handled by the companion Am7992 "Serial Interface Adapter" chip manufactured in a bipolar process.
The AUI interface can then be connected to any AUI-compatible transceiver, which AMD (among other manufacturers) produced as well, e.g. the Am7996 transceivers for 10BASE5 and 10BASE2 networks. With the advent of twisted-pair Ethernet, 10BASE-T transceivers like the Am79C98 and Am79C100 were introduced.
Later "PCnet"-branded devices like the Am79C960 for the ISA bus and the AM79C970 for the PCI bus integrated both the MAC and as well as SIA (for AUI) and 10BASE-T PHY on a single chip, while retaining software compatibility to the Am7990.
Chip bugs
The old LANCE (Rev. C) chips have a bug which causes garbage to be inserted in front of the received packet. The workaround is to ignore packets with an invalid destination address (garbage will usually not match). Of course, this precludes multicast support.[3]
The Amiga SANA-II network interface API has poor multicast support, and this chip bug might be the reason.
No capability for transmit buffer byte count of zero.
Receive lockup may occur if bus latency is large.
External loopback on a live network may cause reception of invalid loopback failure indications.
Receive descriptor zero byte count buffer interpreted as 4096 available bytes.
Will poll computer memory every 1.6 ms for new packets to transmit.
Uses
AMD Am7990DC from SGI IP6 motherboard
Amiga 2065, the first Ethernet controller for Commodore's Amiga computer family. It uses the Zorro-II bus interface and is equipped with the NMOS Am7990 chip.[4][5]
MicroVAXQ-Bus Ethernet controllers (like the DELQA).
